资 源 简 介
The TPD2E009 provides 2 ESD clamp circuits with flow-through pin mapping for ease of board layout. This device has been designed to protect sensiTIve components which are connected to ultra high-speed data and transmission lines. The TPD2E009 offers protecTIon from stress caused by ESD (electrostaTIc discharge). This device also offers 5 A (8/20 µs) peak pulse current raTIngs per IEC 61000-4-5 (lightning) specification.
The monolithic silicon technology allows matching between the differential signal pairs. The less than differential 0.05-pF capacitance ensures that the differential signal distortion due to added ESD clamp remains minimal. The 0.7-pF line capacitance is suitable for high-speed data rate (in excess of 6 Gbps).
The TPD2E009 conforms to IEC61000-4-2 (Level 4) ESD protection. The DRT (1 mm × 1 mm) package is offered for space-saving portable applications. The industry standard DBZ (2.4 mm × 2.9 mm) package offers additional flexibility in the board layout for the system designer.
The TPD2E009 is characterized for operation over ambient air temperature range of –40°C to 85°C.
