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基于嵌入式系统的VLIW功耗估计与优化方法

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  • 标      签: 嵌入式系统

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LOW power design is playing an important role in today ultra-largescale integraTIon (ULSI) design, parTIcularly as we conTInue to doublethe number of transistors on a die every two years and increase thefrequency of operaTIon at fairly the same rate. Certainly, an importantaspect of low power faces with mobile communications and it has a hugeimpact on our lives, as we are at the start-line of the proliferation ofmobile PDA’s (Personal Digital Assistants), Wireless LAN and portablemulti-media computing. All of these devices are shaping the way we willbe interacting with our family, peers and workplace, thus requiring alsoa new and innovative low power design paradigm.Furthermore, low power design techniques are becoming paramount inhigh performance desktop, base-station and server applications, such ashigh-speed microprocessors, where excess in power dissipation can leadto a number of cooling, reliability and signal integrity concerns severelyburdening the total industrial cost. Hence, low power design can beeasily anticipated to further come into prominence as we move to nextgeneration System-on-Chip and Network-on-Chip designs.This book is entirely devoted to disseminate the results of a long termresearch program between Politecnico di Milano (Italy) and STMicroelectronics,in the field of architectural exploration and optimizationtechniques to designing low power embedded systems.Some of the recent and most promising advances in techniques andmethodologies for power-conscious design are presented here, spanningdifferent levels of design abstraction, from SW transformations and algorithmsto high performance VLIW processor’s micro-architecture, powermacro-modeling and optimization.I’m glad to see that the outstanding work carried out by Dr. Zaccariaduring his PhD fits tightly with STMicroelectronics’ continuous committmenton research and innovation.
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