资 源 简 介
This 16-bit buffer/driver is designed for 1.65-V to 3.6-V VCC operaTIon, and provides a high-performance bus interface for wide data paths.
The 3-state control gate is a 2-input AND gate with acTIve-low inputs so that if either output-enable (OE1 or OE2) input is high, all corresponding outputs are in the high-impedance state.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment.
AcTIve bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.
To ensure the high-impedance state during power up or power down, OE should be TIed to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
