资 源 简 介
The ’LVTH16500 devices are 18-bit universal bus transceivers designed for low-voltage (3.3-V) VCC operaTIon, but with the capability to provide a TTL interface to a 5-V system environment.
Data flow in each direcTIon is controlled by output-enable (OEAB and OEBA), latch-enable (LEAB and LEBA), and clock (CLKAB and CLKBA) inputs. For A-to-B data flow, the devices operate in the transparent mode when LEAB is high. When LEAB is low, the A data is latched if CLKAB is held at a high or low logic level. If LEAB is low, the A data is stored in the latch/flip-flop on the high-to-low transiTIon of CLKAB. OEAB is acTIve high. When OEAB is high, the B-port outputs are active. When OEAB is low, the B-port outputs are in the high-impedance state.
