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MX98224EC pdf datasheet (24-po

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  • 上传时间:2021-12-12
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  • 标      签: 以太网接口芯片 MX9

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MX98224EC is a stand-alone 10/100M Ethernet switchcontroller with SRAM embedded which saves 2-3 extra64KX64 SRAM cost. Any standalone desktop orenterprising Ethernet switches can be achieved bysimply combining MX98224EC and quad/octal physicaldevices. All 24 ports are full duplex capable to providededicated 20/200M bandwidth connecTIons each port.MX98224EC basically supports store-and-forwardswitching scheme with two address entry tables, 4K sizeeach. The funcTIon modules integrated in controllerinclude 24-port half/full-duplex compaTIble media accesscontroller with RMII interface, address resoluTIon logic(ARL) for address learning, filtering, recognition, priorityqueue manager, port base VLAN. It fully complies withIEEE Std. 802.3/802.3u/802.1q specifications andsupports MDC/MDIO interface for physical layermanagement with industrial standard physical devices.The switch architecture adopting dynamic buffermanagement shared by 24 ports can reach full-linespeed of high performance application. To savesystem cost, single 50Mhz clock is for RMII and systemrequirement. MX98224EC proceeds in advancedfoundry and smaller package which consumes lowerpower dissipation.The smart features with low power CPU or EEPROMare for system configuration and ALR access required.Also, it emphasizes at Class of Service (CoS) whichextracts various packet types in appropriate forwardingscheme. Now, Voice over IP (VoIP) is applied thefeature for cutting voice packet latency and promise thequality of service. In addition, port-base VLAN isanother valuable feature for the switches. MX98224ECoffers 12 groups with port overlapping allowed. Thefeature can add on more security and data flow in thesame switch with different groups should get connectionthrough router. The powerful switching architectureand robust design can easily reach high performance,non-blocking data flow.Head-of-line blocking prevents switch performance, andoperation defective from other port impacts. The switcharchitecture provides a clean port independentoperation. It guarantees port transmission or receiveis not affected by other ports.Moreover, user can discard broadcast packets regardingthe threshold of system overload. This preventspotential broadcast storming from abnormal events.After buffer fullness drops in the safe margin, the switchcontroller jumps into flow control state to allow physicalports work as normal condition.MX98224EC provides self on test as soon as power onor reset. It will detect all buffer memory and addresstable and others. If defective, LED is automatically on.Several LEDs are defined in switch controller like statusof broadcast storm, packet loss, and buffer full.
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