资 源 简 介
This 1-bit to 4-bit address register/driver is designed for 1.65-V to 3.6-V VCC operaTIon.
This device is ideal for use in applicaTIons in which a single address bus is driving four separate memory locaTIons. The SN74ALVCH162832 can be used as a buffer or a register, depending on the logic level of the select (SEL) input.
When SEL is a logic high, the device is in the buffer mode. The outputs follow the inputs and are controlled by the two output-enable (OE) inputs. Each OE controls two groups of seven outputs.
When SEL is a logic low, the device is in the register mode. The register is an edge-triggered D-type flip-flop. On the posiTIve transition of the clock (CLK) input, data at the A inputs is stored in the internal registers.
