资 源 简 介
The AM26LS32A and AM26LS33A devices are quadruple differenTIal line receivers for balanced and unbalanced digital data transmission. The enable funcTIon is common to all four receivers and offers a choice of acTIve-high or acTIve-low input. The 3-state outputs permit connection directly to a bus-organized system. Fail-safe design ensures that, if the inputs are open, the outputs always are high.
Compared to the AM26LS32 and the AM26LS33, the AM26LS32A and AM26LS33A incorporate an additional stage of amplification to improve sensitivity. The input impedance has been increased, resulting in less loading of the bus line. The additional stage has increased propagation delay; however, this does not affect interchangeability in most applications.
