资 源 简 介
This octal transparent D-type latch features 3-state outputs designed specifically for driving highly capaciTIve or relaTIvely low-impedance loads. It is parTIcularly suitable for implemenTIng buffer registers, I/O ports, bidirectional bus drivers, and working registers.
While the latch-enable (LE) input is high, the Q outputs respond to the data (D) inputs. When LE is low, the outputs are latched to retain the data that was set up.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components.
