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SN65LVDS18,SN65LVP18,SN65LVDS1

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  • 标      签: Buffers

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These four devices are high frequency oscillator gain stages supporTIng both LVPECL or LVDS on the high gain outputs in 3.3-V or 2.5-V systems. AddiTIonally, provides the opTIon of both single-ended input (PECL levels on the SN65LVx18) and fully differenTIal inputs on the SN65LVx19. The SN65LVx18 provides the user a Gain Control (GC) for controlling the Q output from 300 mV to 860 mV either by leaving it open (NC), grounded, or tied to VCC. (When left open, the Q output defaults to 575 mV.) The Q on the SN65LVx19 defaults to 575 mV as well. Both devices provide a voltage reference (VBB) of typically 1.35 V below VCC for use in receiving single-ended PECL input signals. When not used, VBB should be unconnected or open.
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