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This document provides an overview of the MPC106 PCI bridge/memory controller(PCIB/MC). It includes the following:• An overview of MPC106 features• Details about the MPC106 device. This includes descripTIons of the MPC106’sfuncTIonal units and power management support.• A descripTIon of the MPC106’s signals• A descripTIon of the MPC106’s address maps and registersIn this document, the term ‘60x’ is used to denote a 32-bit microprocessor from thePowerPC architecture family that conforms to the bus interface of the PowerPC 601™,PowerPC 603™, or PowerPC 604™ microprocessors. Note that this does not include thePowerPC 602™ microprocessor which has a multiplexed address/data bus. 60x processorsimplement the PowerPC architecture as it is specified for 32-bit addressing, which provides32-bit effective (logical) addresses, integer data types of 8, 16, and 32 bits,
