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ADCLK854,pdf datasheet (Low Po

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  • 标      签: 时钟分配芯片 buffer

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The ADCLK854 is a 1.2 GHz/250 MHz LVDS/CMOS fanout buffer opTImized for low jitter and low power operaTIon. Possible configuraTIons range from 12 LVDS to 24 CMOS outputs, including combinaTIons of LVDS and CMOS outputs. Three control lines are used to determine whether fixed blocks of outputs (three banks of four) are LVDS or CMOS outputs.
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