资 源 简 介
The SN74GTLPH16927 is a medium-drive, 18-bit bus transceiver that provides LVTTL-to-GTLP and GTLP-to-LVTTL signal-level translaTIon. The device allows for transparent and latched modes of data transfer. AddiTIonally, with the use of the clock-mode select (CMS) input, the device can be used in source-synchronous and clock-synchronous applicaTIons. Source-synchronous applicaTIons require the skew between the clock output and data output to be minimized for optimum maximum-frequency system performance. In order to reduce this skew, a flexible setup-time adjustment (FSTA) feature is incorporated into the device that sets a predetermined delay between the clock and data. The CMS and direction (DIR) inputs control the mode of the device.
