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This 2-to-4 line decoder is designed for 1.65-V to 5.5-V VCC operaTIon.
The SN74LVC1G139 2-line to 4-line decoder is designed to be used in high-performance memory-decoding or data-rouTIng applicaTIons requiring very short propagaTIon delay times. In high-performance memory systems, this decoder can be used to minimize the effects of system decoding. When used with high-speed memories utilizing a fast enable circuit, the delay times of these decoders and the enable time of the memory usually are less than the typical access time of the memory. This means that the effective system delay introduced by the decoder is negligible.
NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
