资 源 简 介
The LMH0031 SMPTE 292M / 259M Digital VideoDeserializer/Descrambler with Video and Ancillary DataFIFOs is a monolithic integrated circuit that deserializes anddecodes SMPTE 292M, 1.485Gbps (or 1.483Gbps) serialcomponent video data, to 20-bit parallel data with a synchronizedparallel word-rate clock. It also deserializes and decodesSMPTE 259M, 270Mbps, 360Mbps andSMPTE 344M (proposed) 540Mbps serial component videodata, to 10-bit parallel data. FuncTIons performed by theLMH0031 include: clock/data recovery from the serial data,serial-to-parallel data conversion, SMPTE standard data decoding,NRZI-to-NRZ conversion, parallel data clock generaTIon,word framing, CRC and EDH data checking and handling,Ancillary Data extracTIon and automaTIc video formatdetermination. The parallel video output features a variabledepthFIFO which can be adjusted to delay the output dataup to 4 parallel data clock periods. Ancillary Data may beselectively extracted from the parallel data through the useof masking and control bits in the configuration and controlregisters and stored in the on-chip FIFO. Reverse LSB ditheringis also implemented.
