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SN74SSTL16847,pdf(20-Bit SSTL_

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  • 标      签: Interface

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This 20-bit buffer is designed for 3-V to 3.6-V VCC operaTIon and SSTL_3 input levels. Data flow from A to Y is controlled by the output-enable (OE). When OE is high, the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be TIed to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. The SN74SSTL16847 is characterized for operaTIon from 0°C to 70°C.
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