资 源 简 介
These octal D-type edge-triggered flip-flops feature 3-state outputs designed specifically for bus driving. They are parTIcularly suitable for implemenTIng buffer registers, I/O ports, bidirecTIonal bus drivers, and working registers.
The eight flip-flops enter data on the low-to-high transiTIon of the clock (CLK) input. The SN74ALS575A, SN54AS575, and SN74AS575 may be synchronously cleared by taking the clear () input low.
The output-enable () input does not affect internal operations of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
The SN54ALS574B, SN54AS574, and SN54AS575 are characterized for operation over the full military temperature range of -55°C to 125°C.
