首页| 行业标准| 论文文档| 电子资料| 图纸模型
购买积分 购买会员 激活码充值

您现在的位置是:团子下载站 > 其他 > 4029 CMOS可预制加、减(十、二进制)计数器

4029 CMOS可预制加、减(十、二进制)计数器

  • 资源大小:94
  • 上传时间:2021-10-13
  • 下载次数:0次
  • 浏览次数:27次
  • 资源积分:1积分
  • 标      签: 4029 CMOS

资 源 简 介

The CD4029BC is a presettable up/down counter whichcounts in either binary or decade mode depending on thevoltage level applied at binary/decade input. When binary/decade is at logical “1”, the counter counts in binary, otherwiseit counts in decade. Similarly, the counter counts upwhen the up/down input is at logical “1” and vice versa.A logical “1” preset enable signal allows information at the“jam” inputs to preset the counter to any state asynchronouslywith the clock. The counter is advanced one countat the positive-going edge of the clock if the carry in andpreset enable inputs are at logical “0”. Advancement isinhibited when either or both of these two inputs is at logical“1”. The carry out signal is normally at logical “1” stateand goes to logical “0” state when the counter reaches itsmaximum count in the “up” mode or the minimum count inthe “down” mode provided the carry input is at logical “0”state.All inputs are protected against static discharge by diodeclamps to both VDD and VSS.
VIP VIP