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Two to Tango： MCUs Team Up with FPGAs
嵌入式设计人员花了大量的时间来寻找合适的微控制器（MCU）来完成手头的任务。通常，空间是一个约束，原始性能、I/O、内存资源、电源绘制和外围设备的正确组合成为寻找合适配置的圣杯。
如果你有特定设计需要的专业逻辑，搜索会变得更加复杂。也许这是一个“秘密酱”，你的公司知道如何比别人做得更好，使最终产品脱颖而出。在这种情况下，没有人能完全按照你想要的方式来制造一个微控制器。
还有另一种选择：协同MCU和FPGA配对。高密度FPGA可以吸收，他们可以结合微太多逻辑，甚至房子MICROS，单独做超过部分。此外，你的逻辑的专有本质隐藏在FPGA内部的窥探中。
本文讨论了几种允许设计者将FPGA技术与嵌入式处理器相结合的选项。我们将研究单片方法、片上系统（SOC）解决方案、堆栈和模块。
Single-chip soluTIons
Micros can be made to run pretty fast. We are all familiar with mulTI-gigahertz processors at our fingerTIps. However， faster processors are typically more costly and harder to implement; PCB traces become transmission lines and TIght impedance control is needed， especially on critical path signals. Not every design can shoulder the cost and time to develop with such devices.
This leaves lower cost， more general-purpose processors running at slower speeds as an alternative， more-economical choice for our designs. For non-demanding applications， this alone is good， but when the need for speed exceeds the micro’s cycle time， we have to make a choice. Software-based approaches cannot compete with the speed of a hard-logic implementation of a function. You can use discrete logic on a board， or couple the processor core with a pure logic resource like an FPGA.
