资 源 简 介
The PCA9516 is a BiCMOS integrated circuit intended forapplicaTIon in I2C and SMBus systems.While retaining all the operaTIng modes and features of the I2Csystem, it permits extension of the I2C-bus by buffering both the data(SDA) and the clock (SCL) lines, thus enabling five buses of 400 pF.The I2C-bus capacitance limit of 400 pF restricts the number ofdevices and bus length. Using the PCA9516 enables the systemdesigner to divide the bus into five segments off of a hub where anysegment to segment transiTIon sees only one repeater delay.It can also be used to run different buses at 5 V and 3.3 V or400 kHz and 100 kHz buses where the 100 kHz bus is isolatedwhen 400 kHz operaTIon of the other bus is required.Two or more PCA9516s cannot be put in series. The PCA9516design does not allow this configuration. Since there is no directionpin, slightly different “legal” low voltage levels are used to avoidlock-up conditions between the input and the output of eachrepeater in the hub. A “regular LOW” applied at the input of aPCA9516 will be propagated as a “buffered LOW” with a slightlyhigher value on all the enabled outputs. When this “buffered LOW” isapplied to another PCA9515, PCA9516, or PCA9518 in series, thesecond PCA9515, PCA9516, or PCA9518 will not recognize it as a“regular LOW” and will not propagate it as a “buffered LOW” again.The PCA9510/9511/9513/9514 and PCA9512 cannot be used inseries with the PCA9515, PCA9516, or PCA9518 but can be used inseries with themselves since they use shifting instead of staticoffsets to avoid lock-up conditions.
