资 源 简 介
Preface . xvc h a p t e r 1 IntroducTIon and Methodology . . 11.1 Digital Systems and Embedded Systems 11.2 Binary RepresentaTIon and Circuit Elements 41.3 Real-World Circuits 91.3.1 Integrated Circuits . . . 101.3.2 Logic Levels . . . 111.3.3 StaTIc Load Levels . . . 131.3.4 CapaciTIve Load and Propagation Delay 151.3.5 Wire Delay 171.3.6 Sequential Timing . . . 171.3.7 Power . . . 181.3.8 Area and Packaging . . 191.4 Models . 211.5 Design Methodology 261.5.1 Embedded Systems Design . 311.6 Chapter Summary . 331.7 Further Reading . . . 34Exercises 35c h a p t e r 2 Combinational Basics 392.1 Boolean Functions and Boolean Algebra . . . 392.1.1 Boolean Functions . . . 392.1.2 Boolean Algebra 482.1.3 Verilog Models of Boolean Equations . . 512.2 Binary Coding 542.2.1 Using Vectors for Binary Codes . . . 562.2.2 Bit Errors 582.3 Combinational Components and Circuits . . 622.3.1 Decoders and Encoders 622.3.2 Multiplexers . . . 682.3.3 Active-Low Logic . . . 712.4 Verification of Combinational Circuits 742.5 Chapter Summary . 812.6 Further Reading . . . 82Exercises 83c h a p t e r 3 Numeric Basics 873.1 Unsigned Integers . . 873.1.1 Coding Unsigned Integers . . 873.1.2 Operations on Unsigned Integers . 923.1.3 Gray Codes 1163.2 Signed Integers 1193.2.1 Coding Signed Integers 1193.2.2 Operations on Signed Integers 1223.3 Fixed-Point Numbers 1313.3.1 Coding Fixed-Point Numbers 1313.3.2 Operations on Fixed-Point Numbers . . . 1363.4 Floating-Point Numbers . . 1383.4.1 Coding Floating-Point Numbers . . 1383.5 Chapter Summary . 1433.6 Further Reading . . . 144Exercises 144c h a p t e r 4 Sequential Basics 1514.1 Storage Elements . . 1514.1.1 Flip-flops and Registers 1514.1.2 Shift Registers . . 1614.1.3 Latches . . 1624.2 Counters 1674.3 Sequential Datapaths and Control . . . 1754.3.1 Finite-State Machines 1794.4 Clocked Synchronous Timing Methodology . 1874.4.1 Asynchronous Inputs . 1924.4.2 Verification of Sequential Circuits . 1964.4.3 Asynchronous Timing Methodologies . . 2004.5 Chapter Summary . 2034.6 Further Reading . . . 204Exercises 205c h a p t e r 5 Memories 2115.1 General Concepts . . 2115.2 Memory Types 2195.2.1 Asynchronous Static RAM . 2205.2.2 Synchronous Static RAM . . . 2225.2.3 Multiport Memories . 2295.2.4 Dynamic RAM . 2335.2.5 Read-Only Memories 2355.3 Error Detection and Correction 2405.4 Chapter Summary . 2445.5 Further Reading . . . 245Exercises 246c h a p t e r 6 Implementation Fabrics 2496.1 Integrated Circuits . 2496.1.1 Integrated Circuit Manufacture . . . 2506.1.2 SSI and MSI Logic Families . 2526.1.3 Application-Specific Integrated Circuits (ASICs) . . . 2556.2 Programmable Logic Devices . . 2586.2.1 Programmable Array Logic . 2586.2.2 Complex PLDs . 2626.2.3 Field-Programmable Gate Arrays . 2636.3 Packaging and Circuit Boards . 2696.4 Interconnection and Signal Integrity . . 2726.4.1 Differential Signaling . 2766.5 Chapter Summary . 2786.6 Further Reading . . . 279Exercises 280c h a p t e r 7 Processor Basics 2817.1 Embedded Computer Organization . . 2817.1.1 Microcontrollers and Processor Cores . . 2837.2 Instructions and Data 2857.2.1 The Gumnut Instruction Set 2877.2.2 The Gumnut Assembler 2967.2.3 Instruction Encoding . 2987.2.4 Other CPU Instruction Sets . 3007.3 Interfacing with Memory . 3027.3.1 Cache Memory . 3077.4 Chapter Summary . 3117.5 Further Reading . . . 311Exercises 312c h a p t e r 8 I/O Interfacing 3158.1 I/O Devices . . 3158.1.1 Input Devices . . 3168.1.2 Output Devices . 321CONTENTS xi8.2 I/O Controllers 3308.2.1 Simple I/O Controllers 3318.2.2 Autonomous I/O Controllers 3358.3 Parallel Buses . 3388.3.1 Multiplexed Buses . . . 3388.3.2 Tristate Buses . . 3428.3.3 Open-Drain Buses . . . 3488.3.4 Bus Protocols . . 3498.4 Serial Transmission 3538.4.1 Serial Transmission Techniques . . . 3538.4.2 Serial Interface Standards . . 3578.5 I/O Software . 3608.5.1 Polling . . . 3608.5.2 Interrupts 3628.5.3 Timers . . . 3668.6 Chapter Summary . 3738.7 Further Reading . . . 374Exercises 375c h a p t e r 9 Accelerators . . 3799.1 General Concepts . . 3799.2 Case Study: Video Edge-Detection . . . 3869.3 Verifying an Accelerator . . 4079.4 Chapter Summary . 4199.5 Further Reading . . . 419Exercises 420c h a p t e r 1 0 Design Methodology 42310.1 Design Flow . . 42310.1.1 Architecture Exploration . . . 42510.1.2 Functional Design . . . 42710.1.3 Functional Verification 42910.1.4 Synthesis . 43510.1.5 Physical Design . 43810.2 Design Optimization 44110.2.1 Area Optimization . . 44210.2.2 Timing Optimization . 44310.2.3 Power Optimization . 44810.3 Design for Test 45110.3.1 Fault Models and Fault Simulation 45210.3.2 Scan Design and Boundary Scan . . 45410.3.3 Built-In Self Test (BIST) . . . 45810.4 Nontechnical Issues 46210.5 In Conclusion . 46310.6 Chapter Summary . 46510.7 Further Reading . . . 466a p p e n d i x a Knowledge Test Quiz Answers . . 469a p p e n d i x b Introduction to Electronic Circuits 501B.1 Components . . 501B.1.1 Voltage Sources . 502B.1.2 Resistors . 502B.1.3 Capacitors 503B.1.4 Inductors . 503B.1.5 MOSFETs 504B.1.6 Diodes . . . 506B.1.7 Bipolar Transistors . . 507B.2 Circuits 508B.2.1 Kirchhoff’s Laws 508B.2.2 Series and Parallel R, C, and L . . . 509B.2.3 RC Circuits 511B.2.4 RLC Circuits . . . 512B.3 Further Reading . . . 515a p p e n d i x c Verilog for Synthesis 517C.1 Data Types and Operations . . . 517C.2 Combinational Functions . 518C.3 Sequential Circuits . 522C.3.1 Finite-State Machines 525C.4 Memories 527a p p e n d i x d The Gumnut Microcontroller Core 531D.1 The Gumnut Instruction Set . . . 531D.1.1 Arithmetic and Logical Instructions . . . 531D.1.2 Shift Instructions 535D.1.3 Memory and I/O Instructions 536D.1.4 Branch Instructions . . 537D.1.5 Jump Instructions . . . 537D.1.6 Miscellaneous Instructions . 538D.2 The Gumnut Bus Interface 538Index . . 541
