资 源 简 介
Each TPS2343 contains main supply power control, auxiliary supply power control, power FETs for 12-V, -12-V and auxiliary 3.3-V supplies, VIO control, and digital control for two slots.
The main power control circuits start with all supplies off and all outputs are held off unTIl PGOOD is asserted, indicaTIng that system supplies are valid. Then, when power enable is asserted, the control circuit applies constant current to the gates of the power FETs, allowing each FET to ramp load voltage linearly. Each supply can be programmed for a desired ramp rate by selecTIng the appropriate gate capacitor. The TPS2343 monitors load current and regulates peak current to prevent disturbances to the system power rails. If load current remains regulated for longer than 5 ms, that slot is latched off.
