资 源 简 介
These devices are designed to mulTIplex signals from 4-bit data sources to 4-output data lines in bus-organized systems. The 3-state outputs do not load the data lines when the output-enable (G) input is at a high logic level.
To ensure the high-impedance state during power up or power down, G should be TIed to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.