资 源 简 介
The CD54HC646 and CD74HCT646 consist of bus-transceiver circuits with 3-state outputs, D-type flip-flops, and control circuitry arranged for mulTIplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus is clocked into the registers on the low-to-high transiTIon of the appropriate clock (CLKAB or CLKBA) input. Figure 1 illustrates the four fundamental bus-management funcTIons that can be performed with these devices.
Output-enable (OE) and direcTIon-control (DIR) inputs control the transceiver functions. In the transceiver mode, data present at the high-impedance port can be stored in either or both registers.
The select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data.
